itc08_wohl Increasing Scan Compression by Using X-chains

Abstract
Scan testing and scan compression are key to realizing
cost reduction and quality control of ever more complex
designs.

1. Introduction
Shrinking process technologies and new materials make
it necessary to deploy several fault models, such as stuck-at,
transition delay, and shorts/opens to achieve high defect
coverage [1], [2].

Unfortunately, aggressive designs and technologies, and
sophisticated fault models also result in an increased number
of scan cells that capture an unknown (X) value, i.e., a value
that cannot be accurately predicted by the simulation used
during the ATPG process. Unknown values seen in a zerodelay
simulation insensitive to operating parameters are
termed “static”; examples include unmodeled blocks (analog,
memories) or bus contentions.
(static Xs)
(page 1 col 2)
Extended usage of RAM memories

Aggressive timing of designs creates a large number of
false paths that are modeled by masking the values captured
in scan cells during test application, thus increasing
the number of Xs.

Generation of patterns that pulse multiple clocks to maximize
fault detection per pattern. Because inter-clock
domain paths are timed differently, data captured from a
different clock domain are masked, thus creating Xs
Unknown values challenge any compression method, in
particular deeply sequential compressors, such as MISR
p2